Technical Field
The invention relates to a gate driving technique, and particularly relates to a gate driver and a control method thereof.
Related Art
FIG. 1 is a schematic diagram of a conventional gate driver. Referring to FIG. 1, in order to accurately control a voltage level across a capacitor C2 to be not greater than a withstand voltage value, the gate driver 100 detects the voltage value across the capacitor C2 by using a comparator 110, and transmits a detecting result to a level shift circuit 120. Once the detecting result indicates that the voltage value is over or lower than a threshold range of a voltage reference value REF, the level shift circuit 120 turns off a P-type metal oxide semiconductor transistor (PMOS) 130. However, during a process that the gate driver 100 controls switching of a first switch 140 and a second switch 150, the first switch 140 and the second switch 150 are all turned off in a transient time period. The transient time period is a non-interactive time period, which is about 2 nanoseconds (ns). During the non-interactive time period, an inductor current IL flows through a parasitic diode of the second switch 150, and now if a working voltage VDD continuously charges the capacitor C2 through a diode 132 and the PMOS 130, the voltage value across the capacitor C2 probably exceeds a withstand voltage range of the first switch 140. In other words, it is difficult to accomplish a series of procedures (such as detection, determination and control procedures) within such short non-interactive time period. For example, within 2 ns, the comparator 110 detects the voltage across the capacitor C2, and the level shift circuit 120 determines whether to turn off the PMOS 130 according to the detecting result. Therefore, an actual circuit design thereof is difficult, and the cost is increased due to a complicated circuit design.